In recent years, standards of USB 2.0 and a high-definition multimedia interface (HDMI) have been widely distributed as high-speed signal transmission interfaces, and they are used in many digital devices such as personal computers and digital high-vision televisions. These interfaces employ a differential signal system that transmits a differential signal (a differential mode signal) by using a pair of signal lines, unlike a single-end transmission system that has been generally used for many years.
The differential transmission system has excellent characteristics in that the system is not easily affected by exogenous noise as well as that the system has a small radiation electromagnetic field generated from the signal lines, as compared with the single-end transmission system. Therefore, a signal can have small amplitude, and the system can perform a higher-speed signal transmission than the single-end transmission system, by shortening arise time and a fall time based on the small amplitude.
FIG. 11 is a circuit diagram of a general differential transmission circuit.
The differential transmission circuit shown in FIG. 11 includes a pair of signal lines 1 and 2, an output buffer 3 that supplies a differential mode signal to the signal lines 1 and 2, and an input buffer 4 that receives a differential mode signal from the signal lines 1 and 2. In this configuration, an input signal IN given to the output buffer 3 is transmitted to the input buffer 4 via the pair of signal lines 1 and 2, and is reproduced as an output signal OUT. This differential transmission circuit has a characteristic that a radiation electromagnetic field generated from the signal lines 1 and 2 is small, as described above. However, this circuit generates a relatively large radiation electromagnetic field when common noise (common mode noise) is superimposed on the signal lines 1 and 2. To decrease the radiation electromagnetic field generated by the common mode noise, it is effective to insert a common-mode choke coil 5 into the signal lines 1 and 2, as shown in FIG. 11.
The common-mode choke coil 5 has characteristics that impedance to a differential component (a differential mode signal) transmitted through the signal lines 1 and 2 is low and that impedance to an in-phase component (common mode noise) is high. Therefore, by inserting the common-mode choke coil 5 into the signal lines 1 and 2, common mode noise transmitted through the pair of signal lines 1 and 2 can be interrupted without substantially attenuating the differential mode signal.
In a latest high-speed digital interface such as an HDMI, an IC very sensitive to static electricity is used because the interface handles a fine signal of a high transmission rate. Accordingly, ESD (electrostatic discharge) becomes a large problem. To prevent destruction of the IC due to ESD, a varistor is used as an ESD countermeasure device between the signal lines and a base. However, when the varistor is used, a signal waveform becomes inert, and signal quality is degraded. Therefore, a lower-capacitance ESD countermeasure device is required. For example, as shown in FIG. 12, Japanese Patent Application Laid-open No. 2008-28214 proposes an ESD protection circuit having an electrostatic capacitance of an ESD protection device 9 set to 0.3 pF or lower, by connecting a coil 8 in series on signal lines 7 connected to an IC 6 and by connecting the ESD protection device 9 between each signal line 7 and the ground (see FIG. 8 of Japanese Patent Application Laid-open No. 2008-28214).
Japanese Patent Application Laid-open No. 2007-214166 discloses a structure having a voltage-dependency resistance material having an ESD protection function provided on an uppermost part of a composite electronic device accommodating a common-mode noise filter and the ESD protection function in one package. According to this structure, the voltage-dependency resistance material can be provided after sintering a laminated body containing many insulation layers. With this arrangement, it is possible to prevent reduction of the ESD protection function due to oxidation and cracking of the voltage-dependency resistance material at a sintering time. Consequently, the ESD protection function can be improved.
Furthermore, Japanese Patent Application Laid-open No. 2006-261585 discloses a common mode filter including first and second coil conductors electromagnetically coupled to each other, and having a satisfactory high-frequency characteristic by arranging that a relation between a cutoff frequency fc of the common mode filter and a conductor width W and a total length L of the first coil conductor satisfy relational equation expressed by √(L/W)<(7.6651−fc)/0.1385.
In a conventional circuit configuration shown in FIG. 12, it is preferable that the protection voltage of the IC 6 is as high as possible. The protection voltage in this case means a voltage at which the IC 6 is broken. For example, it is known that a conventional circuit configured by combining a general varistor of 6 pF as a ESD protection element and a common mode filter can secure a protection voltage of 5 kV. However, as described above, because the varistor has a large electrostatic capacitance and its signal quality is degraded, a circuit capable of obtaining a protection voltage equal to or higher than that of a varistor while minimizing the electrostatic capacitance has been desired.
In the common mode filter described in Japanese Patent Application Laid-open No. 2007-214166, the voltage-dependency resistance material constituting ESD protection elements contains a resin. Therefore, the ESD protection elements need to be provided on the uppermost part due to a constraint of a manufacturing step which becomes a large constraint on design. The voltage-dependency resistance material is filled into a very fine gap of about 10 μm. At the uppermost part, an uneven area is large in a plane surface due to a structure that many insulation layers formed with conductor patterns are laminated. Consequently, it is considerably difficult to stably form a very fine gap. Further, in forming the ESD protection elements on a top layer, the manufacturing step becomes complex, and manufacturing cost increases.